الفهرس 
chapter 1Only 14 pages are availabe for public view
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Abstract
Ferroelectric memory has been shown to be one of the most important nonvolatile memories today. This type of nonvolatile memories compared to flash memories and electrically erasable and programmable read-only memories (EEPROMs) has the advantages of short programming time, low power consumption during the write process, and it can be embedded easily as part of a larger integrated circuit to provide system-on-a-chip solutions to various applications. On the other hand, it has the disadvan-tages of relatively long read time, high power consumption during the read process, and small density compared to flash memories and EE-PROMs.
The emergence of new applications has the effect of encouraging the research in this area. Two examples of such applications of ferroelec-tric memories are contactless smart cards and digital cameras. In this the-sis, our concern is on the reference generation methods.
Reading ferroelectric memory cells that contains two transistors and two ferroelectric capacitors does not require generating a reference voltage as this type of FE memories is self-referenced. However, this con-struction of FRAM cells requires a relatively large space and thus limits the memory density. So other construction that contains one transistor and one ferroelectric capacitor (1T-1C) per cell is commonly used. However, reading the 1T-1C cell requires generating a reference voltage that is equal to the arithmetic mean of the voltage generated on the bitline when reading ”1”, V1, and the voltage generated on the bitline when reading ”0”, V0. In this thesis, we discuss novel circuit techniques for generating an adaptive reference voltage that adapts itself to the nonidealities of the FE capacitors such as fatigue and imprint. Circuit techniques that act to increase the sense margin and self-referenced reading schemes are also considered.