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Abstract In this thesis, error detection, correction and interleaver techniques have been used which are essential for reliable communication system like DVB-T over a noisy channel. The effect of errors occurring during transmission is reduced by adding redundancy to the data prior to transmission. The redundancy is used to enable a decoder in the receiver to detect and correct errors. Cyclic Linear block codes are used efficiently for error detection and correction. The encoder splits the incoming data stream into blocks and processes each block individually by adding redundancy in accordance with a prescribed algorithm. Likewise, the decoder processes each block individually and it corrects errors by exploiting the redundancy present in the received data. An important advantage of cyclic codes is that they are easy to encode. Also they possess a well-defined mathematical structure which has led to very efficient decoding schemes for them. Galois finite fields are used for the processing of linear block codes. In each Galois field there exists a finite element α , and all other nonzero elements of the field are represented as powers of this primitive element α . The symbols used in the block codes are the elements of a finite Galois field. Due to modulo arithmetic followed in the finite fields, the resultant of any algebraic operation is mapped into the field and hence rounding issues are conveniently solved. So the addition, subtraction, multiplication or division of two codewords is again a valid codeword inside the field. Reed – Solomon codes are one of the most powerful and efficient nonbinary error – correcting codes for detecting and correcting Conclusion & Summary - 81 - burst errors. An irreducible generator polynomial is used for generating the encoded data called codeword. All encoded data symbols are elements of the Galois field defined by the parameters of the application and the properties of the system. The encoder is implemented using linear shift registers with feedback. The decoder checks the received data for any errors by calculating the syndrome of the codeword. If an error is detected, the process of correction begins by locating the errors first. Generally Berlekamp-Massy’s Algorithm is used to calculate the error – locator polynomial it is more hardware efficient to implement, while its counterpart Eculldin’s Algorithm is easy to implement. The precise location of the errors is calculated by using Chien search algorithm. Then magnitude of the errors is calculated using Forney’s algorithm. The magnitude of the error is added to the received codeword to obtain a correct codeword. Hence the using the Reed – Solomon codes, burst errors can be effectively corrected. Reed – Solomon Codes are efficiently used for compact discs to correct the bursts which might occur due to scratches or fingerprints on the discs. Also, due to its outstanding error correcting capability on both random and burst errors, Reed-Solomon codes are nowadays widely used in various types of digital communication systems, especially in DVB (Digital Video Broadcasting) systems, HDTV systems, satellite communication systems, and data storage systems. An interleaver should exist to randomize the effect of channel errors. To spread out the burst errors in time such that it could be better handled by the decoder if they become random errors, Interleaver before transmission and deinterleaver after reception could be used. Conclusion & Summary - 82 - Since, in all practical cases, the channel memory decreases with time separation. These functions are implemented using VHDL code and simulated on Xilinx ISE 12.3. Then the code is synthesized on Virtex 6 (XC6VLX240T) FPGA. The design is verified by the loop back technique where it is found that the data output from the decoding process is identical to that input to the encoder. In addition, RS (204,188) encoder simulation result is compared is with IP core RS (204,188) which already implemented on Xilinx. It is found that both designs give the same functional performance results which validate our design. While our design consumes larger area from the chip, it is faster than the IP core from Xilinx. This work shows that the other building blocks of the DVB-T system can be implemented in a similar way done here for the outer codec. In this way can construct the physical layer of the DVB-T system and this really is one of the software radio defined radio implementations. |