الفهرس 
SDR TRANSMITTER DESIGNOnly 14 pages are availabe for public view
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Abstract
Dynamic Partial Reconfiguration (DPR) has been used extensively over the past few years allowing reconfiguration of Field Programmable Gate Arrays (FPGAs) during the run time. FPGA is considered one of the best solutions for implementing reconfigurable hardware. The concept of hardware reconfiguration exists for several decades and passed through many evolution phases. With the aid of DPR, multi-standard Software Defined Radio (SDR) system can be implemented in order to save power and area extensively. Over the past few years, wireless communication standards witnessed great and rapid evolution. The market is always acquiring higher data rates and more special services. This leads to increasing the design complexity, area, and power consumption. Deploying DPR technology on FPGAs made it feasible to design and manufacture all wireless communications standards on the same hardware. Loading each standard on demand reduces area utilization and power consumption.
SDR is a communication system whose physical layer is used to do all the computations using the software. The communication blocks in ordinary radio transceivers are designed in a fixed environment to process a certain waveform. SDR is able to process many waveforms since it can be easily configured using software. It is becoming achievable, as the flexibility in the digital front-end reconfiguration increases. One of the advantages of implementing the SDR is increasing the flexiblity that aids in performing dynamic and real-time reconfiguration. Another advantage of using SDR is the efficient use of resources under varying conditions. Bottom line is, the hardware flexibility allows the SDR dynamic system to implement different standards within real-time without the need to switch off the system. The fundamental challenge facing the deployment of SDR is how to achieve sufficient computational capacity, in particular for processing wide-band high bit rate waveforms, within acceptable size and weight factors, within acceptable unit costs, and reduced power consumption compared to the communication standards implemented in current mobile phones.
This work implements SDR transceiver system for five wireless communication stan- dards: Bluetooth, Wi-Fi, 2G, 3G, and LTE on Zynq-7000 evaluation kit. The new DPR technique is used to switch between different multi-standard communication systems on the same FPGA partition. Implementing SDR using DPR combines the advantage of hard- ware performance and software flexibility. A test environment is established to measure the effectiveness of the new technique. Two approaches are deployed to implement the five transceivers using DPR. The first technique uses a single reconfigurable partition for the transmitter and the receiver. The second technique recommends splitting the design into multi-partitions in order to achieve the best performance for all transceivers. A compari- son is performed for the system total area and power consumption between the two DPR approaches and the case of no DPR. The single partition approach achieves reduction of area and power by 10.19% and 76.71% respectively with a reasonable switching time. The multi-partition approach is able to reduce the allocated area and power consumption for all chains. Power reduction for 2G and Bluetooth is 95.43%, for 3G and Wi-Fi is 79.69%, for LTE is 59.09% compared with the case of no DPR.