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Abstract This thesis presents new architecture of power amplifier (PA), the PA achieves high efficiency, good linearity and it is a frequency re-configurable which works for two different bands which are 24-30GHz and 37-42GHz. Using stacked topology to increase the output power capability of PA in order to enable long-range applications in complementary-metal-oxide-semiconductor (CMOS) technology. First of all, designing adaptive bias circuit that enhances linearity and efficiency of PA by changing its bias with input power level. This circuit is designed to decrease process, voltage and temperature variations. The design of PA with adaptive biasing allows 3 dB improvement of the output compression point (OP1dB) and a 24% improvement in peak power added efficiency (PAE) compared to conventional class A PA. Secondly, designing a frequency re-configurable PA works for two different bands. The design uses integrated tunable matching network to reconfigure the PA input and output matching network. The design improves OP1dB and power gain for low frequency band by 1.5dBm and 2dB respectively higher than the broadband design |