الفهرس 
Automated performance-based design technique for an efficient lte pdsch implementation using sdsoc tool
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Abstract
This thesis demonstrates the work of the typical SDSoC design flow. In addition, a proposed algorithm design flow using SDSoC is developed to introduce new automated design techniques to design SoC on a heterogeneous FPGA-CPU platform based on performance metrics constraints such as area, power and latency. Design of Physical Downlink Shared CHannel (PDSCH) in Long-Term Evolution (LTE) is presented as a case study. The objective of this thesis is to realize the implementation of the LTE PDSCH transmitter and LTE PDSCH receiver using SDSOC tool and to select a platform that meets performance metrics constraints and to select the platform that achieves the best performance