الفهرس | Only 14 pages are availabe for public view |
Abstract Today, there’s a huge demand for wireless, wearable, and comfortable healthcare devices that can continuously monitor vital signs like blood pressure. These devices require minimum power consumption to extend battery life, less area for compact size, and high performance for device reliability. The analog front-end signal chain of this system has an Analog-to-Digital Converter to interface with the digital domain. For this specific design, a SAR ADC converter is implemented and the main challenge is maintaining a low-power consumption design. This thesis presents an optimized design scope for a low-power, 12-bit SAR ADC converter for the adopted application. A new low-power system-level behavioural model design as a proof-of-concept, includes top-plate sampling technique switching scheme with insights towards its digital generation using low-power design techniques. Furthermore, the SAR logic architecture implementation, RTL waveforms simulation, and advanced nodes finding. The novel idea automated a digital designed part that saves the design time, while maintaining a low power design than in the conventional design methodology. Circuits implementation design with performance metrics of 1.15 μW power consumption, sampling frequency of 1 kS/s using 130 nm CMOS technology. |