الفهرس 
Background of Functional Verification of Digital Designs
Bug Detection PerformanceOnly 14 pages are availabe for public view
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Abstract
As digital designs grow more and more complex, the verification of such designs also becomes more challenging and time-consuming. This is mainly due to the difficulty of achieving functional coverage closure for the designs in a timely manner and with limited resources. Conventional methods, such as directed testing leave much to be desired as they only target specific scenarios that the verification engineer has managed to think of. More advanced methods, such as constrained random verification, prove more efficient as they leave some room for randomization within legal constraints in order to come up with novel scenarios that might not have been thought of by the verification engineer. However, this method also leaves much to be desired, since a major part of it is left to chance, the uncovering of bugs and the closure of functional coverage becomes a function of the number of times each testcase is run. Here, there is a gap which can be filled by using machine learning. One aspect in which machine learning can help us by reducing runtimes while achieving the same coverage scores. Supervised learning has been researched quite thoroughly for this application, unsupervised learning has been researched less thoroughly and reinforcement learning has been researched least of all for this type of application.
In this thesis, reinforcement learning usage for the purpose of accelerating functional coverage closure is explored and applied to three different RTL designs. Additionally, RL usage for the improvement of bug discovery is also explored. And lastly, a novel approach towards RL agent training in case of complex action spaces is introduced which helps to address the issue of non-convergence or long time to convergence during training of RL agent with large, compelx action spaces. The proposed method showed up to 97% reduction in simulation time to reach functional coverage closure in an example RTL, as well as an average reduction in simulation time of up to 70% was reached for the same RTL.