الفهرس 
The VHDL Hardware Description LanguageOnly 14 pages are availabe for public view
 |  | from | 186 |  |  |
| | | from | 186 | | |
Abstract
Using hardware description languages in Modeling and
simulation of hardware systems is an important and challinging
subject. Several computer languages are devised especially for this
task with some successes and failures.
The aim of this research is to investigate the capabilities and
limitations of two famous hardware description languages. Brief
description of both (VHSIC Hardware Description Language)
VHDL and (Simulation Program with Integrated Circuit Emphasis)
PSpice are addressed. The basic digital building blocks are
described and simulated using the two languages. A compraison
between the two models (VHDL model and PSpice model) of each
building block is performed and explained, as well as the
limitations of both languages are described.
A real case study (Priority switch circuit) is performed to
verify the results of the comparison between the two languages. The
circuit is descriped using these primitives in both languages. The
two models are simulated using a digital and mixed mode
simulators. The results confirm that capability of VHDL in
modeling and simulation of digital circuits however the PSpice is
more powerful in analog simulation .
key words
VHDL, PSpice, Modeling and Simulation.