الفهرس 
Radio Receivers Performance and System DesignOnly 14 pages are availabe for public view
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Abstract
A new front-end architecture for RF integrated wireless transceivers is presented.
The proposed architecture is a novel image-reject mixer that eliminates the need
for quadrature mixing. Since the inability to generate matched quadrature
components in terms of phase and gain was responsible for degrading the image
signal suppression, it is believed that this architecture will highly enhance the
performance of integrated receivers.
The performance of the proposed architecture is compared to other conventional
techniques which shows that this architecture achieves higher levels of image
signal suppression. Sources of error as well as practical considerations in the
design of such architecture are discussed. Modified architectures to overcome
these sources of error are also presented. The performance of this new
architecture is verified using MATLAB and behavioral level simulation. In
addition, a highly linear RF CMOS mixer based on Gilbert cell multiplier is
presented. The mixer is designed and simulated using HSPICE in AMI O.8J..lm
CWL CMOS process provided by MOSIS. The performance of the mixer is
verified using transistor-level simulation.