الفهرس 
Artificial Neural Networks (anns) OverviewOnly 14 pages are availabe for public view
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Abstract
This thesis presents an overview of designing an analog VLSI system; namely a programmable neural network in linear as well as subthreshold regions using CMOS technology. Synaptic weights are designed in the triode region. In addition, the processing element (PE) and the nonlinear activation function are designed in subthreshold region. Such subthreshold CMOS technology has some interesting features, such as high integration density, exponential transfer characteristics and low power consumption. This system is realized in a standard 0.8?m CMOS technology and operated with a (R+ (B1V power supply. First, the programmable linear synaptic weight is implemented as two series NMOS transistors with switchedresistor technique applied on a CMOS switch and a capacitor C. A twoNMOStransistors buffer stage is proposed to be between the weight and the PE. The programmability is achieved by using a control unit to vary the output current by controlling the voltage VGS2. Next, PE is implemented as a twostage CMOS operational amplifier (op amp) with 9 transistors. The PE differential input stage is designed in subthreshold region to obtain micropower dissipation. PE has the advantage of having railtorail input and output stages suitable for lowvoltage applications.